| 摘要 |
<p>PURPOSE: A programmer device for reducing data validation time by validating and reading data in FPGA at the same time is provided to reduce the load of micom by calculating data validation by hardware after data erasing or data programming about a plurality of semiconductor devices. CONSTITUTION: A plurality of FPGAs(Field Programmable Gate Arrays)(200) is installed on each semiconductor device. A plurality of FPGAs performs data programming or data erasing about the semiconductor device. A micom(100) controls a plurality of FPGAs. The FPGA calculates CheckSum and CRC(Cyclic Redundancy Check) for validating and reading data by hardware at the same time.</p> |
