发明名称 MEMORY SYSTEM AND CONTROL METHOD FOR THE SAME
摘要 PURPOSE: A memory system and a control method for the same are provided to process a decoding operation based on repeated calculation based on probability by using an LLR(Log Likelihood Ratio) table. CONSTITUTION: Semiconductor memory cells memorize N-bit encoded data based on threshold voltage distribution, and a memorizing unit(20) memorizes first and second LLR(Long Likelihood Ratio) tables(21,22). The LLR tables comprise LLR data corresponding to threshold voltage. A decoder(1) performs a decoding operation through probability-based repeated calculation by using an LLR calculated from the first and second LLR tables and the threshold voltage.
申请公布号 KR20110037842(A) 申请公布日期 2011.04.13
申请号 KR20100085926 申请日期 2010.09.02
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 SAKURADA KENJI;UCHIKAWA HIRONORI
分类号 G06F11/10;G06F9/30 主分类号 G06F11/10
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