发明名称 STACKING OF WAFER-LEVEL CHIP SCALE PACKAGES HAVING EDGE CONTACTS
摘要 <p>A microelectronic assembly can include a first microelectronic device and a second microelectronic device. Each microelectronic device has a die structure including at least one semiconductor die and each of the microelectronic devices has a first surface, a second surface remote from the first surface and at least one edge surface extending at angles other than a right angle away from the first and second surfaces. At least one electrically conductive element extends along the first surface onto at least one of the edge surfaces and onto the second surface. At least one conductive element of the first microelectronic device can be conductively bonded to the at least one conductive element of the second microelectronic device to provide an electrically conductive path therebetween.</p>
申请公布号 EP2308087(A1) 申请公布日期 2011.04.13
申请号 EP20090767074 申请日期 2009.06.15
申请人 TESSERA RESEARCH LLC 发明人 HABA, BELGACEM;MOHAMMED, ILYAS;MIRKARIMI, LAURA;KRIMAN, MOSHE
分类号 H01L25/10;H01L21/98;H01L23/31;H01L25/065 主分类号 H01L25/10
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