| 摘要 |
Embodiments describe a transmit driver that processes data communication between a scheduler and a turbo encoder. Transmit driver receives a request for a super frame and ascertains whether it has enough information to start the super frame. If there is enough data, the super frame is written to an appropriate hardware register. Both Direct Memory Access (DMA) and non-DMA hardware can be supported with the one or more embodiments.
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