发明名称 Method to reduce collector resistance of a bipolar transistor and integration into a standard CMOS flow
摘要 The invention, in one aspect, provides a method for fabricating a semiconductor device. In one aspect, the method provides for a dual implantation of a tub of a bipolar transistor. The tub in bipolar region is implanted by implanting the tub through separate implant masks that are also used to implant tubs associated with MOS fabricate different voltage devices in a non-bipolar region during the fabrication of MOS transistors.
申请公布号 US7923340(B2) 申请公布日期 2011.04.12
申请号 US20070523368 申请日期 2007.02.14
申请人 AGERE SYSTEMS INC. 发明人 CHEN ALAN S.;DYSON MARK;ROSSI NACE M.;SINGH RANBIR;YUAN XIAOJUN
分类号 H01L21/331;H01L21/8222 主分类号 H01L21/331
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