发明名称 Integrated circuit including four layers of vertically stacked embedded re-writeable non-volatile two-terminal memory
摘要 A multi-layer non-volatile memory integrally formed on top of a substrate including active circuitry is disclosed. Each layer of memory includes memory cells (e.g., a two-terminal memory cell) having a multi-resistive state material layer that changes its resistive state between a low resistive state and a high resistive state upon application of a write voltage across the memory cell. Data stored in the memory cells can be non-destructively determined by applying a read voltage across the memory cells. Data storage capacity can be tailored to a specific application by increasing or decreasing the number of memory layers that are integrally fabricated on top of the substrate (e.g., more than four layers or less than four layers). The memory cells can include a non-ohmic device for allowing access to the memory cell only during read and write operations. Each memory layer can comprise a cross point array.
申请公布号 US2011080767(A1) 申请公布日期 2011.04.07
申请号 US20100928239 申请日期 2010.12.06
申请人 UNITY SEMICONDUCTOR CORPORATION 发明人 RINERSON DARRELL;CHEVALLIER CHRISTOOPHE J.;HSIA STEVE KUO-REN
分类号 G11C11/00;G11C11/56;G11C13/00;H01L21/8246;H01L27/10;H01L27/115;H01L27/24;H01L45/00 主分类号 G11C11/00
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