发明名称 METHOD FOR PRODUCING PARTIAL SOI STRUCTURES COMPRISING ZONES CONNECTING A SUPERFICIAL LAYER AND A SUBSTRATE
摘要 The method involves forming patterns (23) on a semiconductor material e.g. silicon, substrate, where the patterns are formed from a buried layer made of a dielectric material e.g. oxide or nitride. A layer, made of semiconductor material e.g. single-crystal, polycrystalline or amorphous silicon, is formed between and on the patterns, where the layer has a homogeneous surface. Thermal treatment of the semiconductor material layer is carried out to totally or partially modify crystallinity of the layer. The layer is planarized and is assembled with another silicon substrate (30). An independent claim is also included for a semiconductor device comprising a support.
申请公布号 KR101026387(B1) 申请公布日期 2011.04.07
申请号 KR20087022815 申请日期 2007.02.26
申请人 发明人
分类号 H01L27/12;H01L21/20 主分类号 H01L27/12
代理机构 代理人
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