发明名称 |
DUAL MODE ELEMENT AND SEMICONDUCTOR CIRCUIT COMPRISING THE ELEMENT AND METHOD FOR ENHANCING TIMING YIELD OF SEMICONDUCTOR CIRCUIT |
摘要 |
PURPOSE: A dual mode element is provided to improve the timing yield of a semiconductor circuit by increasing the operation speed of a timing critical gate. CONSTITUTION: A first logical operation part(10) is connected to an input terminal and an output terminal. A second logical operation part(20) is connected to the input terminal and output terminal. The second logical operation part processes the same logic operation as the first logical operation part. The second logical operation part has a faster operation speed than the first logical operation part. The second logical operation part is disabled in the first mode. The second logical operation part is enabled in the second mode. The first mode comprises a normal mode. The second mode comprises a fast mode. Mode switches(30,40) enables or disables the second logical operation part. |
申请公布号 |
KR20110036441(A) |
申请公布日期 |
2011.04.07 |
申请号 |
KR20090094110 |
申请日期 |
2009.10.01 |
申请人 |
IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY) |
发明人 |
SHIN, HYUN CHUL;KIM, YOUNG HWAN;KIM, WOOK;YOO, DONG GON |
分类号 |
H03K19/177 |
主分类号 |
H03K19/177 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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