| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor memory in which the number of writing pulses to be applied is lessened and improvement in the speed of data writing is enabled. <P>SOLUTION: The nonvolatile semiconductor memory device is equipped with: a memory cell array including a plurality of memory cells to store N value data (N being an integer equal to or larger than 3); and a writing circuit configured to repeatedly execute a writing cycle on a plurality of memory cells until data writing is finished. The writing circuit divides the pulse width of the writing pulse into a plurality of sections to change the pulse height among the sections to provide voltages for writing to different target threshold levels, and brings the bit line connected with the memory cell in which writing to the respective target threshold levels is performed, into a writable selected state by synchronizing it with the applying period to the respective target threshold level. <P>COPYRIGHT: (C)2011,JPO&INPIT</p> |
