| 摘要 |
PROBLEM TO BE SOLVED: To conduct a delay test of a path as a probable critical path in a manufactured integrated circuit. SOLUTION: A delay test apparatus includes: a pair selection unit 101 for selecting a pair of a start point latch and an end point latch on the critical path; a statistical timing analysis unit 10 for implementing a statistical timing analysis for the path between the start point latch and the end point latch of the selected pair, and for calculating a delay distribution of each path; and a delay test data generating unit 102 for sorting the path based on a deviation of the delay distribution, evaluating it in the sort order, and generating delay test data. COPYRIGHT: (C)2011,JPO&INPIT |
