发明名称 PATTERN DENSITY VERIFICATION METHOD AND PROGRAM
摘要 PROBLEM TO BE SOLVED: To prevent the determination of the contravention of a design rule at a macro cell in density verification for an entire chip. SOLUTION: A pattern density verification method comprises steps for: setting an inside auxiliary section and an outside auxiliary section at the inside and the outside, respectively, in a verification area (step S19); and determining whether or not the pattern density D2 of the verification area in which the pattern occupation area of the outside auxiliary section is added to the pattern occupation area of the inside auxiliary section satisfies a density standard (step S20). COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2011070630(A) 申请公布日期 2011.04.07
申请号 JP20100062000 申请日期 2010.03.18
申请人 FUJITSU SEMICONDUCTOR LTD 发明人 HORI TOSHIKAZU;MIYAKE TSUNEHITO;YABUTA TAKUSHI
分类号 G06F17/50;H01L21/82 主分类号 G06F17/50
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