发明名称 VERTICAL NAND CHARGE TRAP FLASH MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME
摘要 <p>PURPOSE: A vertical NAND charge trap flash memory device and a manufacturing method thereof are provided to highly integrate a memory device by vertically connecting cell transistors with a charge trap layer in series. CONSTITUTION: A single crystal semiconductor channel(150) is vertically formed on a semiconductor substrate(100). A GSL(Ground Source Line) electrode(115) is adjacent to the semiconductor substrate and surrounds a signal crystal semiconductor channel. A tunnel oxide layer(145) surrounds the channel side of a single crystal semiconductor filler shape. First to n+1 interlayer insulation layers(120a,120b,120c,120d,120e) are formed on the GSL electrode. A charge trap layer(170) is formed between the first to n+1 interlayer insulation layers.</p>
申请公布号 KR20110034816(A) 申请公布日期 2011.04.06
申请号 KR20090092258 申请日期 2009.09.29
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KIM, YOUNG HOO;LEE, HYO SAN;BAE, SANG WON;YOON, BO UN;LEE, KUN TACK
分类号 H01L21/8247;H01L27/115 主分类号 H01L21/8247
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