METHOD FOR EXPOSING THROUGH-BASE WAFER VIAS FOR FABRICATION OF STACKED DEVICES

摘要

PURPOSE: A method for exposing a through base wafer via for manufacturing the stack apparatus is provided to reduce the silicon tailing after CMP process. CONSTITUTION: A base wafer having a front side and a back side is arranged. The base wafer comprises one or more conductive vias. The front side of the base wafer is attached to the carrier. The back side of the base wafer touches the grinding pad and the CMP slurry. The back side of the base wafer is polished.