发明名称 |
Method of designing semiconductor integrated circuits, and semiconductor integrated circuits that allow precise adjustment of delay time |
摘要 |
Standard cell libraries and methods of designing semiconductor integrated circuits are provided. At least one of delay-adjusting cell data and load-capacitor cell data is stored in the cell library for a specified type standard cell in addition to the standard cell data. The specified type standard cell may be utilized as a delay-adjusting cell or a load-capacitor cell. Accordingly, precise adjustment of delay times during designing a semiconductor integrated circuit is enabled without requiring registering a new standard cell in the cell library. Semiconductor integrated circuits are also provided that are configured to allow precise adjustment of delay times in the semiconductor integrated circuits.
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申请公布号 |
US7921397(B2) |
申请公布日期 |
2011.04.05 |
申请号 |
US20070000409 |
申请日期 |
2007.12.12 |
申请人 |
KAWASAKI MICROELECTRONICS, INC. |
发明人 |
YAMAGUCHI YUSUKE |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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