发明名称 |
WRITING TO MEMORY USING SHARED ADDRESS BUSES |
摘要 |
Techniques for writing to memory using shared address buses. A memory device that includes a plurality of memory arrays connected to a common address bus, the common address bus used to broadcast memory addresses simultaneously to the plurality of memory arrays. Each memory array includes a plurality of memory locations and circuitry for: receiving the broadcasted memory addresses from the address bus; selecting a memory address in the memory array from a list of most recent memory addresses received from the address bus; and performing a memory access at the selected memory address, such that at a given point in time at least two of the memory arrays perform the memory access at a different broadcasted address when the memory access is a write.
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申请公布号 |
US2011078387(A1) |
申请公布日期 |
2011.03.31 |
申请号 |
US20090568125 |
申请日期 |
2009.09.28 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
CHIRAS STEFANIE;FRANCESCHINI MICHELE;KARIDIS JOHN P.;LASTRAS LUIS A.;SHARMA MAYANK |
分类号 |
G06F12/00 |
主分类号 |
G06F12/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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