发明名称 |
DYNAMIC SELECTION OF EXECUTION STAGE |
摘要 |
Methods and apparatus relating to dynamic selection of execution stage are described. In some embodiments, logic may determine whether to execute an instruction at one of a plurality of stages in a processor. In some embodiments, the plurality of stages are to at least correspond to an address generation stage or an execution stage of the instruction. Other embodiments are also described and claimed. |
申请公布号 |
US2011078486(A1) |
申请公布日期 |
2011.03.31 |
申请号 |
US20090571379 |
申请日期 |
2009.09.30 |
申请人 |
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发明人 |
LIMAYE DEEPAK;KOTHARI KULIN N.;ALLEN JAMES D.;PHILLIPS JAMES E. |
分类号 |
G06F9/30;G06F1/04;G06F12/02 |
主分类号 |
G06F9/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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