| 发明名称 |
DUAL INTERCONNECTION IN STACKED MEMORY AND CONTROLLER MODULE |
| 摘要 |
A chip package transmitting slow speed signals via edge connectors and high speed signals by means of through-silicon-vias. The edge connectors are formed in recesses formed in the sidewalls of the package. |
| 申请公布号 |
WO2010129172(A3) |
申请公布日期 |
2011.03.31 |
| 申请号 |
WO2010US31872 |
申请日期 |
2010.04.21 |
| 申请人 |
WAFER-LEVEL PACKAGING PORTFOLIO LLC;MARCOUX, PHIL, P. |
发明人 |
MARCOUX, PHIL, P. |
| 分类号 |
H01L23/48;H01L23/12 |
主分类号 |
H01L23/48 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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