发明名称 |
STRUCTURE AND METHOD FOR SEMICONDUCTOR TESTING |
摘要 |
An embodiment of a test structure in accordance with the present invention comprises a pair of interdigitated comb portions of a metallization layer present in a recess of an inter-layer dielectric (ILD) formed over a polysilicon heater element. A third portion of the metallization layer comprises a serpentine metal line interposed between the comb portions. Application of force voltages, and detection of sense voltages, at various nodes of the metallization portions allows identification of the following: (1) electromigration of metal in the metallization portions; (2) extrusion of metal from one metallization portion to contact another; (3) breakdown voltage (Vbd) and time dependent dielectric breakdown (TDDB) of the ILD; (4) contamination in the metallization portions with mobile ions; and (5) k valve and drift in k value of the ILD. A bias voltage may be applied to the polysilicon heater to accomplish temperature control during testing.
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申请公布号 |
US2011074459(A1) |
申请公布日期 |
2011.03.31 |
申请号 |
US20100887491 |
申请日期 |
2010.09.21 |
申请人 |
SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION |
发明人 |
RUAN WEI WEI;GONG BIN;SHI WEN |
分类号 |
G01R31/26;H01L23/48 |
主分类号 |
G01R31/26 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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