DATA REARRANGING CIRCUIT, VARIABLE DELAY CIRCUIT, HIGH-SPEED FOURIER TRANSFORM CIRCUIT, AND DATA REARRANGING METHOD

摘要

A data rearranging circuit has variable delay means and a control means. The variable delay means impart delays to the respective pieces of data of a data group that are input to a plurality of ports in the respective ones of a plurality of cycles in such a manner that the delays have their respective different numbers of delay cycles for the respective ports in the respective input cycles, thereby changing the data order at the respective same ports, thereby outputting, as the data group, the respective pieces of data with respective predetermined delays. The control means outputs control information including the numbers of delay cycles used in the variable delay means.