发明名称 MOUNTING BOARD AND FAILURE PREDICTING METHOD
摘要 Provided is a mounting board on which a semiconductor package is mounted by a ball grid array by using bumps.  The mounting board has first and second wiring lines which are formed in a region below a corner section of the semiconductor package for the purpose of detecting a change of an electrical resistance value due to disconnection.  Furthermore, the mounting board has electrode pads, and the bumps are formed on the electrode pads.  One of the first and the second wiring lines is connected to the electrode pad, and each of the first and the second wiring lines has a low-strength structure having a rupture strength lower than that of bonding between the mounting board and the semiconductor package.
申请公布号 WO2011036776(A1) 申请公布日期 2011.03.31
申请号 WO2009JP66698 申请日期 2009.09.25
申请人 KABUSHIKI KAISHA TOSHIBA;YAMAYOSE, YUU;HIROHATA, KENJI 发明人 YAMAYOSE, YUU;HIROHATA, KENJI
分类号 H05K3/34 主分类号 H05K3/34
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