发明名称 SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor device having a test operation mode for determining a logic level of a plurality of internal signals by a current measurement result. SOLUTION: A test circuit 100 includes current sources 11-14, a reference current source 21, an input initial stage circuit 31, an OR circuit 35, selector circuits 41-44 and a terminal capacity countermeasure transistor (N-channel type MOS transistor Mn31). The current sources 11-14 constitute a current control circuit, and sends to the ground, a current corresponding to the size of a constituted transistors connected in series from an external terminal INP through the terminal capacity countermeasure transistor (N-channel type MOS transistor Mn31) in a test operation mode. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2011064479(A) 申请公布日期 2011.03.31
申请号 JP20090213060 申请日期 2009.09.15
申请人 ELPIDA MEMORY INC;HITACHI ULSI SYSTEMS CO LTD 发明人 TODOKORO MASAYA;ISHIKAWA TORU
分类号 G01R31/28;H01L21/822;H01L27/04 主分类号 G01R31/28
代理机构 代理人
主权项
地址