发明名称 METHODS AND APPARATUS FOR WRITE-SIDE INTERCELL INTERFERENCE MITIGATION IN FLASH MEMORIES
摘要 Methods and apparatus are provided for read-side intercell interference mitigation in flash memories. A flash memory device is read by obtaining a read value for at least one target cell; obtaining a value representing a voltage stored in at least one aggressor cell that was programmed after the target cell; determining intercell interference for the target cell from the at least one aggressor cell; and obtaining a new read value that compensates for the intercell interference by removing the determined intercell interference from the read value for the at least one target cell. The new read value can optionally be provided to a decoder. In an iterative implementation, one or more intercell interference mitigation parameters can be adjusted if a decoding error occurs.
申请公布号 IL210394(D0) 申请公布日期 2011.03.31
申请号 IL20100210394 申请日期 2010.12.30
申请人 MILOS IVKOVIC;ANDREI VITYAEV;ERICH F. HARATSCH;VICTOR KRACHKOVSKY;LSI CORPORATION;NENAD MILADINOVIC;JOHNSON YEN 发明人
分类号 G11C 主分类号 G11C
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