发明名称 |
Twin cell architecture for integrated circuit dynamic random access memory (DRAM) devices and those devices incorporating embedded DRAM |
摘要 |
A twin cell architecture for dynamic random access memory (DRAM) devices and those devices incorporating embedded DRAM utilizing an open bitline configuration is disclosed. The twin cell architecture disclosed has significant advantages over conventional designs in terms of power, radiation hardness and speed and does not require intermediate supply voltage bitline precharge while allowing for 6F2 memory cell layouts.
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申请公布号 |
US7916567(B2) |
申请公布日期 |
2011.03.29 |
申请号 |
US20080044664 |
申请日期 |
2008.03.07 |
申请人 |
PROMOS TECHNOLOGIES PTE. LTD |
发明人 |
PARRIS MICHAEL C.;BUTLER DOUGLAS B. |
分类号 |
G11C7/00;G11C7/06 |
主分类号 |
G11C7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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