| 摘要 |
A shift register comprising at least one shift register unit. The shift register unit comprises an input unit, at least one first TFT, and at least one second TFT. The input unit receives an input signal from the input terminal and outputs a switching control signal in accordance with a first clock signal. The gate of the first TFT is for receiving the switching control signal, the drain of the first TFT is for receiving a second clock signal, and the source of the first TFT is coupled to the output terminal. The gate and drain of the second TFT are coupled to the output terminal, and the source of the second TFT is coupled to the input unit.
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