发明名称 Scalable port controller architecture supporting data streams of different speeds
摘要 A scalable port controller architecture supporting data streams of different speeds. In an embodiment, a port controller contains high speed receptor units and low speed receptor units, and a port routing logic connecting each external device (on corresponding port) to one of the receptors according to various registers. The port routing logic may connect an external device to one of the receptors, which determines the data rate at which data on a corresponding virtual connection from the external device is being received/sent. If the receptor does not have sufficient capacity (based on the data rate) to communicate with the external device, the connection is moved to other receptors, potentially in another control unit.
申请公布号 US7917671(B2) 申请公布日期 2011.03.29
申请号 US20070959450 申请日期 2007.12.18
申请人 NVIDIA CORPORATION 发明人 CHILUKOOR MURALIDHARAN SOUNDARARAJAN;CHAPMAN ROBERT;OVERBY MARK ALAN;RANJAN SUYASH
分类号 G06F3/00;G06F13/00 主分类号 G06F3/00
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