发明名称 Memory self-test circuit, semiconductor device and IC card including the same, and memory self-test method
摘要 In a semiconductor device, a self-test circuit includes a write part for writing data in a given address of a special region of a nonvolatile memory; a read part for reading the written data from the given address; a verify part for determining whether or not the written data accords with the read data; and a decision part for determining soundness of the nonvolatile memory on the basis of a result of determination made by the verify part. In the case where the written data accords with the read data, the decision part determines that the nonvolatile memory is sound, and in the case where the data do not accord with each other, it determines that the nonvolatile memory is unsound.
申请公布号 US7916549(B2) 申请公布日期 2011.03.29
申请号 US20090550888 申请日期 2009.08.31
申请人 PANASONIC CORPORATION 发明人 YOSHIOKA KAZUKI
分类号 G11C11/34 主分类号 G11C11/34
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