发明名称 SUCCESSIVE-APPROXIMATION TYPE AD CONVERTER AND METHOD FOR ADJUSTING OPERATION CLOCK OF SUCCESSIVE-APPROXIMATION TYPE AD CONVERTER
摘要 PROBLEM TO BE SOLVED: To provide an asynchronous successive-approximation type A-D converter which can adjust an amount of a delay that specifies an operation clock period by a simple configuration. SOLUTION: The successive-approximation type A-D converter includes a DAC for generating an analog voltage based on a digital code, a comparator to which the analog voltage that is an output of the DAC is input, a DAC control circuit for generating the digital code of the input voltage that is sampled from an external clock signal by successively changing the digital code based on the output of the comparator, a delay circuit for resetting the comparator by a signal transition generated by delaying a signal state change of the output of the comparator, and a delay amount adjustment circuit for counting the number of signal transitions generated during a cycle of the external clock signal and adjusting the amount of the delay of the delay circuit according to the counted value of the signal transition. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2011061597(A) 申请公布日期 2011.03.24
申请号 JP20090210398 申请日期 2009.09.11
申请人 FUJITSU LTD 发明人 YOSHIOKA MASATO
分类号 H03M1/46 主分类号 H03M1/46
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