| 摘要 |
PROBLEM TO BE SOLVED: To prevent stall of a pipe line due to switching of a pipe line, and to reduce processing time and power consumption, in order to solve the conventional problem that the stall has been prevented only when an execution stage is configured of a plurality of clocks and the stage for executing the next instruction is executed by one clock. SOLUTION: The clock frequency of a pipe line having a small number of stages is reduced so that the time for processing one stage of a pipe line having a small number of stages can be multiples of that of one stage of a pipe line having a large number of stages. The number of stages of the pipe line having a large number of stages is adjusted so that the latency of the pipe line having the large number of stages can be equal to the latency of the pipe line having a small number of stages after the frequency of the clock is reduced. COPYRIGHT: (C)2011,JPO&INPIT
|
