发明名称 CAD DESIGN DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a CAD design device capable of smoothly performing interlayer wiring of a multilayer board. SOLUTION: An operation time extracting unit 11 extracts operation time accompanying input of a VIA for interlayer wiring of a multilayer board on a CAD system. An overlap display control unit 12, when a start layer with interlayer wiring started therefrom through input of a VIA and a termination layer as a termination of the interlayer wiring through the VIA are selected, displays a wiring image of at least one of layers ranging from the start layer to the termination layer so as to overlap on a wiring image of the start layer. A push-aside display control unit 13 monitors whether or not a predetermined time determined from the operation time extracted by the operation time extraction unit 11 has elapsed after selection of the termination layer. When the predetermined time has elapsed after the selection of the termination layer, the push-aside display control unit 13 displays a wiring image wherein an object placed before the input of a VIA is pushed aside through the input of a VIA so as not to overlap a signal line wired between the layers. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2011059812(A) 申请公布日期 2011.03.24
申请号 JP20090206382 申请日期 2009.09.07
申请人 FUJITSU LTD 发明人 FUJIBAYASHI TATSUNORI;FUJIMURA KOJI
分类号 G06F17/50;H05K3/00 主分类号 G06F17/50
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