| 摘要 |
PROBLEM TO BE SOLVED: To provide a timing verification device which can perform comprehensive timing verification. SOLUTION: The timing verification device includes an output event scheduling part 1-1 for scheduling an output by an input event satisfying the minimum delay condition out of a change (input event) of an input into an element constituting a logic circuit, an output event scheduling part 1-2 for scheduling an output by an input event satisfying the maximum delay condition, and a scheduler 6 for outputting an event matching with an progress of a simulation time, an output change calculation part 4-1 of the output event scheduling part 1-1 makes a value : signal variable indicating the possibility of generating a signal change serve as an output signal value, when the output signal value varies by the input event satisfying the minimum delay condition, and timing violation detecting parts 3-1, 3-2 detect timing violations when the signal value of a check object is signal-variable at a timing check time. COPYRIGHT: (C)2011,JPO&INPIT
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