发明名称 |
Flow and Methodology to Find TDP Power Efficiency |
摘要 |
A technique for determining thermal design point (TDP) power efficiency for an integrated circuit is disclosed. A simulation executes a set of input vectors on a model of an integrated circuit to generate a first estimated power consumption data during a first number of clock cycles. A simulation executes the set of input vectors on a model of an integrated circuit to generate a second estimated power consumption data during a second number of clock cycles. TDP power efficiency for the integrated circuit is calculated based on the first estimated power consumption data and the second estimated power consumption data.
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申请公布号 |
US2011072412(A1) |
申请公布日期 |
2011.03.24 |
申请号 |
US20100885381 |
申请日期 |
2010.09.17 |
申请人 |
HASSLEN ROBERT J;VUJKOVIC MIODRAG;MUTTREJA ANISH;GANDHI KAUSHAL RAJENDRA |
发明人 |
HASSLEN ROBERT J.;VUJKOVIC MIODRAG;MUTTREJA ANISH;GANDHI KAUSHAL RAJENDRA |
分类号 |
G06G7/62;G06F9/44 |
主分类号 |
G06G7/62 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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