| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device for suppressing change in a threshold voltage of an erasing cell. <P>SOLUTION: A plurality of memory cells each of which includes a NAND cell, are written from source line sides. By a first write operation, a threshold voltage of one memory cell among the plurality of memory cells is set to a first or second (first threshold<second threshold) threshold from the first threshold. By a second write operation, when the threshold voltage of one memory cell is in the first threshold, the threshold voltage is set to a third threshold (first threshold≤third threshold) or a fourth threshold (third threshold<fourth threshold), and when the threshold voltage of the memory cell is in the second threshold, the threshold voltage is set to a fifth threshold (second threshold≤fifth threshold) or a sixth threshold (fifth threshold<sixth threshold). <P>COPYRIGHT: (C)2011,JPO&INPIT</p> |
