Information processing unit, program, and instruction sequence generation method

摘要

An information processing unit includes at least one cache memory (12, 13) provided between an instruction execution section (15) and a storage section (11) and a control section (25) controlling content of address information based on a result of comparison processing between an address requested by a hardware prefetch request issuing section (22a) for memory access and address information held in an address information holding section (21), wherein when the control section (25) causes the address information holding section (21) to hold address information or address information in the address information holding section (21) is updated, overwrite processing on the address information is inhibited for a predetermined time.