发明名称 PACKAGE SUBSTRATE AND METHOD OF FARICATIING THE SAME
摘要 <p>PURPOSE: A package substrate and a manufacturing method thereof are provided to reduce the land co-planarity of a die mounting region and the entire substrate by preventing the warpage of the package substrate. CONSTITUTION: A package substrate includes a circuit layer(10), an insulation layer(20), and an insulation member(30). The circuit layer is comprised of a metal layer to transmit an electric signal and includes a first circuit layer(11) and a second circuit layer(13). The first circuit layer is formed on one side of the insulation layer. The second circuit layer is connected to the first circuit layer through a via(12). The die is formed on one side of the package substrate. The other side of the package substrate is mounted on a mother board. A protection layer(40) is formed on one side or both sides of the package substrate including the first and second circuit layers.</p>
申请公布号 KR20110030152(A) 申请公布日期 2011.03.23
申请号 KR20090088149 申请日期 2009.09.17
申请人 SAMSUNG ELECTRO-MECHANICS CO., LTD. 发明人 LEE, JAE JOON;AN, JIN YONG;KIM, JIN HO;JEON, DONG JU
分类号 H05K1/02 主分类号 H05K1/02
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