| 摘要 |
A semiconductor device having a DRAM region and a logic region embedded together therein, including a first transistor formed in a DRAM region, and having a first source/drain region containing arsenic and phosphorus as impurities; and a second transistor formed in a logic region, and having a second source/drain region containing at least arsenic as an impurity, wherein each of the first source/drain region and the second source/drain region has a silicide layer respectively formed in the surficial portion thereof, and the first source/drain region has a junction depth which is determined by phosphorus and is deeper than the junction depth of the second source/drain region.
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