发明名称 Space and process efficient MRAM
摘要 Embodiments of a magnetoresistive random access memory (MRAM) array include multiple transistors having source and drain regions, and multiple substantially planar MRAM bits. The MRAM bits have upper and lower electrodes and intervening magnetics layers. The lower electrodes of at least some of the MRAM bits are formed substantially directly on at least some of the source or drain regions without an intervening via. Embodiments of an MRAM array also include a first conductive interconnect layer above and in electrical contact with the upper electrodes of at least some of the MRAM bits, with no metal layers intervening between the upper electrodes and the first conductive interconnect layer.
申请公布号 US7911013(B2) 申请公布日期 2011.03.22
申请号 US20090557726 申请日期 2009.09.11
申请人 FREESCALE SEMICONDUCTOR, INC. 发明人 WISE LOREN J.
分类号 H01L29/82 主分类号 H01L29/82
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