| 摘要 |
A finite impulse response filter is implemented as a sum of individual component, running-sum filters. The sum of all of the component filters required for a desired filter response is calculated in an accumulator and only the component filters' update terms, which are the difference between a new and an old discarded sample, is calculated for each component filter. A desired impulse response is decomposed into a sum of rectangular impulse responses of equal height, each of which implemented as a running sum requiring a subtraction and an addition. Using circuits running at a multiple of the sampling clock, multiple running sums may be implemented on the same hardware. A whole filter of arbitrary impulse response shapes and lengths may be implemented using memory and two arithmetic units. Two or more such filters may be cascaded to obtain a better approximation of the desired frequency characteristic. The invention saves significant chip resources and manufacturing costs.
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