发明名称 |
MULTI-CLOCK ASYNCHRONOUS LOGIC CIRCUITS |
摘要 |
Methods, systems, and circuits for implementing multi-clock designs in asynchronous logic circuits are described. A method may include associating one or more data tokens with a clock domain of a multi-clock domain netlist. A durational relationship between a clock period associated with the clock domain and one or more other clock domains of the multi-clock domain netlist may be determined. Data tokens used in other clock domains may be transformed based on the determined relationship.
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申请公布号 |
US2011066873(A1) |
申请公布日期 |
2011.03.17 |
申请号 |
US20090559102 |
申请日期 |
2009.09.14 |
申请人 |
MANOHAR RAJIT;KELLY CLINTON W;EKANAYAKE VIRANTHA;PAUL GAEL;NIJSSEN RAYMOND;VAN DER GOOT MARCEL |
发明人 |
MANOHAR RAJIT;KELLY CLINTON W.;EKANAYAKE VIRANTHA;PAUL GAEL;NIJSSEN RAYMOND;VAN DER GOOT MARCEL |
分类号 |
G06F1/12 |
主分类号 |
G06F1/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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