发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device in which an unintended voltage/current is prevented from being applied to a memory cell. <P>SOLUTION: The semiconductor memory device includes the memory cell having a variable resistance element of which the resistance value varies by application of a voltage, a power supply circuit 11 outputting voltage applied to the memory cell, interconnection L1, L2 formed between the power supply circuit 11 and the memory cell and supplying voltage outputted from the power supply circuit 11 to the memory cell, and a discharging circuit 17 connected to the interconnection. The discharging circuit 17 discharges electric charge accumulated in the interconnection L1, L2 after a first operation of applying the voltage to the memory cell is ended and before a second operation of applying the voltage to the memory cell is started. <P>COPYRIGHT: (C)2011,JPO&INPIT</p>
申请公布号 JP2011054233(A) 申请公布日期 2011.03.17
申请号 JP20090201971 申请日期 2009.09.01
申请人 TOSHIBA CORP 发明人 SHIMOTORI TAKAFUMI
分类号 G11C13/00;H01L27/10;H01L45/00;H01L49/00 主分类号 G11C13/00
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