发明名称 PASSIVE LAYER FOR SEMICONDUCTOR CHIP, AND SEMICONDUCTOR DEVICE
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a chip-integral package, and a semiconductor device. <P>SOLUTION: The chip-integral package includes: an insulating layer 14 laminated on a semiconductor substrate 12; a solenoid-type inductor 28 that is formed in an embodiment of being embedded in the insulating layer 14 while falling sideways and makes electrical connection to either a circuit formed on the semiconductor substrate 12 or an external circuit; and a pair of metal members (metal film 34, metal plate 35) formed in an embodiment of being embedded in a position for blocking an opening 28a across the inductor 28 in the insulating layer 14. <P>COPYRIGHT: (C)2011,JPO&INPIT</p>
申请公布号 JP2011054599(A) 申请公布日期 2011.03.17
申请号 JP20090199472 申请日期 2009.08.31
申请人 SEIKO EPSON CORP 发明人 SHINCHI SHUHEI
分类号 H01L27/04;H01F17/00;H01L21/822;H01L23/12 主分类号 H01L27/04
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