| 摘要 |
PROBLEM TO BE SOLVED: To provide a memory error and redundancy. SOLUTION: The redundancy including additional rows and/or columns of memory cells is added to the memory, and an EEC parity is used to detect errors. When an error occurs at a location the first time, it is assumed to be a soft error, the data are corrected in this location, and an address of the erroneous cell (failed address) is preserved in a list. When another error occurs, it is determined whether the failed address is on the preserved list. If it is not, then the error is again assumed to be a soft error, and the data at this location are corrected, and the failed address is added to a preserved address list. If, however, the failed address is already in the preserved failed address, the error is considered either a latent error or VTR, and is restored by using on-chip redundancy. COPYRIGHT: (C)2011,JPO&INPIT |
