| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a structure having asymmetric source and drain regions. <P>SOLUTION: A method forms the structure that has a substrate having at least one semiconductor channel region, a gate dielectric layer on the upper surface of the substrate over the semiconductor channel region, and a gate conductor on the gate dielectric layer. Asymmetric sidewall spacers are located on the sidewalls of the gate conductor and asymmetric source and drain regions are located, within the substrate, adjacent to the semiconductor channel region. One source/drain region is positioned closer to the midpoint of the gate conductor than is the other source/drain region. The source and drain regions comprise a material that induces physical stress upon the semiconductor channel region. <P>COPYRIGHT: (C)2011,JPO&INPIT</p> |
