| 摘要 |
PROBLEM TO BE SOLVED: To provide an input buffer circuit, an integrated circuit device and an electronic apparatus which avoid the generation of a deterioration mode in which threshold voltages of PMOS transistors shift, and attain highly reliable operations for a long period of time. SOLUTION: The input buffer circuit 1 includes: PMOS transistors 12, 14; NMOS transistors 16, 18; and a level shift circuit 10 which converts a signal having an amplitude equivalent to a potential difference between HVDD and VSS into a signal having amplitude equivalent to a potential difference between LVDD lower than the HVDD and the VSS. To a gate of the PMOS transistor 12, the LVDD is supplied when the NMOS transistor 16 is turned on, and the VSS is supplied when the NMOS transistor 18 is turned on. To a gate of the PMOS transistor 14, the VSS is supplied when the NMOS transistor 16 is turned on, and the LVDD is supplied when the NMOS transistor 18 is turned on. COPYRIGHT: (C)2011,JPO&INPIT
|
