| 摘要 |
PROBLEM TO BE SOLVED: To provide a laminated chip capacitor capable of maintaining proper ESR and reducing ESL. SOLUTION: The laminated chip capacitor includes a capacitor body, a plurality of inner electrode layers each separated by a dielectric layer in the capacitor body, containing at least one electrode plate on the same plane, and having one or two leads, and a plurality of external electrodes which are formed on the outer surface of the capacitor body and are electrically connected to the electrode plates via the leads. The plurality of inner electrode layers arranged vertically in sequence form one block, and such blocks are stacked in repetition. Each electrode plate has one lead extended out of one surface of the capacitor body. Such leads extended out of one surface of the capacitor body are arranged zigzaggedly along the direction of stacking the blocks. The leads of electrode plates adjacent vertically and different in polarity to each other are so arranged as to be always adjacent to each other horizontally. COPYRIGHT: (C)2011,JPO&INPIT
|
