发明名称 |
Structure and manufacturing method of a chip scale package with low fabrication cost, fine pitch and high reliability solder bump |
摘要 |
A new method and package is provided for the mounting of semiconductor devices that have been provided with small-pitch Input/Output interconnect bumps. Fine pitch solder bumps, consisting of pillar metal and a solder bump, are applied directly to the I/O pads of the semiconductor device, the device is then flip-chip bonded to a substrate. Dummy bumps may be provided for cases where the I/O pads of the device are arranged such that additional mechanical support for the device is required.
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申请公布号 |
US7902679(B2) |
申请公布日期 |
2011.03.08 |
申请号 |
US20070981138 |
申请日期 |
2007.10.31 |
申请人 |
MEGICA CORPORATION |
发明人 |
LIN MOU-SHIUNG;LEI MING-TA;LIN CHUEN-JYE |
分类号 |
H01L23/48;H01L23/52;H01L29/40 |
主分类号 |
H01L23/48 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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