发明名称 Method for separately optimizing spacer width for two or more transistor classes using a recess spacer integration
摘要 A method for making a semiconductor device is disclosed. In accordance with the method, a semiconductor structure is provided which includes (a) a substrate (203), (b) first and second gate electrodes (219) disposed over the substrate, each of the first and second gate electrodes having first and second sidewalls, and (c) first (223) and second (225) sets of spacer structures disposed adjacent to the first and second gate electrodes, respectively. A first layer of photoresist (231) is then disposed over the structure such that the first set of spacer structures is exposed and the second set of spacer structures is covered, after which the first set of spacer structures is partially etched.
申请公布号 US7902021(B2) 申请公布日期 2011.03.08
申请号 US20060365059 申请日期 2006.02.28
申请人 FREESCALE SEMICONDUCTOR, INC. 发明人 SRIVASTAVA ANADI
分类号 H01L21/8238 主分类号 H01L21/8238
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