| 摘要 |
<p>PURPOSE: A semiconductor device and a manufacturing method thereof are provided to restrain the voltage drop in floating P+ area by using the bipolar junction transistor having the lower resistance than the PMOS combined with the floating PMOS transistor. CONSTITUTION: A second conductive dip well(105) is formed within a semiconductor substrate(100). A high voltage first conductive well(110) is formed within the partial domain of the semiconductor substrate of top of the second conductive dip well. A high voltage second conductive well(115) is formed within the other domain of the top of the semiconductor substrate.</p> |
