发明名称 Bias circuit scheme for improved reliability in high voltage supply with low voltage device
摘要 Disclosed is a bias circuit with a first resistor connected between the supply voltage and a feedback node. Resistors are connected in series between the feedback node and the reference supply voltage. The connections between the resistors define at least one bias voltage. A second resistor is connected between the feedback node and a first drain node. A first field-effect transistor has a first gate node, the first drain node, and a first source node. The gate node is connected to the first supply voltage. A second field-effect transistor has a second gate node, a second drain node, and a second source node. The second drain node is connected to the first source node. The second gate node is connected to the bias voltage. The second source node is connected to an output signal node. The output signal node capable of experiencing an overshoot voltage.
申请公布号 US7902904(B2) 申请公布日期 2011.03.08
申请号 US20080330828 申请日期 2008.12.09
申请人 LSI CORPORATION 发明人 KUMAR PANKAJ;KOTHANDARAMAN MAKESHWAR;BHATTACHARYA DIPANKAR;KRIZ JOHN;NAGY JEFFREY J.;PARAMESWARAN PRAMOD ELAMANNU
分类号 G05F1/10 主分类号 G05F1/10
代理机构 代理人
主权项
地址