| 摘要 |
A hysteretic comparator is proposed for comparing input signals and producing an output signal VOT with a hysteresis window Vhys. The hysteretic comparator includes a differential input stage with current output (DICO) having input transistors with transconductance Gmtnx for converting the input signals, with an input stage transconductance Gmin, into intermediate signal currents. A steerable offset current generator, driven by a steering control signal, steers an offset current source IOS to alternative offset currents. A current-to-voltage summing converter (IVSC) sums up the intermediate signal currents and the offset currents and converts the result into VOT plus the steering control signal causing Vhys=IOS/Gmin. A feedback resistance RNF is connected to the input transistors to form a negative feedback loop. The RNF is sized such that GMin, hence Vhys, becomes essentially solely dependent upon the feedback conductance GNF=1/RNF independent of the Gmtnx thus its process and environmental variation.
|
