发明名称 Arrangement for solder bump formation on wafers
摘要 An apparatus and a process for the manufacture of a solder-bump adhered wafer substrate for use in the semiconductor industry, comprising one or more of the following steps including: arranging a first compressive member and a second compressive member in an opposed, compressibly displaceable, spaced-apart relationship, with a pattern plate disposed therebetween with the pattern plate having a plurality of aligned through-holes arranged thereon; filling the through-holes with a molten solder; compressing the solder and the pattern plate between the first and second opposed compressive members to compact the solder therein and cleans the pattern plate of excess solder; chilling the pattern plate to solidify the molten solder in the through-holes; and removing the pattern plate from the spaced-apart compressive members to produce a wafer with solder bumps thereon.
申请公布号 US2011053368(A1) 申请公布日期 2011.03.03
申请号 US20090653454 申请日期 2009.12.14
申请人 LEE CHUNGHSIN;ZHANG JIAN 发明人 LEE CHUNGHSIN;ZHANG JIAN
分类号 H01L21/60;B22D27/11 主分类号 H01L21/60
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